1. Field of the Invention
The present invention generally relates to a semiconductor device, and more particularly to a field effect transistor.
2. Description of the Related Art
Presently, high dielectric constant gate dielectrics for silicon complementary metal oxide semiconductor (CMOS) devices, such as transistors, typically utilize a silicon dioxide gate dielectric. Other gate dielectrics employed in manufacturable devices have contained a silicon oxynitride layer as part of the gate dielectric stack as well. As CMOS devices miniaturize, scaling laws require that the parameter e/d, where e and d are the permittivity and thickness of the dielectric layer respectively, reduce as well. For a fixed gate dielectric material such as silicon dioxide, where the permittivity is 3.8, its thickness therefore must reduce as devices become smaller. However, below a physical thickness of approximately 1.5-1.7 nanometers, the layer starts transmitting an unacceptably high amount of electrical leakage current through it.
An additional, secondary problem that arises when the dielectric layer becomes so thin, is that it also becomes impervious to the diffusion of impurities, or dopant atoms, through it. As a result, such a dielectric layer fails to protect the underlying silicon substrate below it.
In view of the foregoing and other problems of the conventional methods and structures, an object of the present invention is to provide a method and structure in which a thin gate dielectric is employed in semiconductor devices such as field effect transistors.
Another object is to use a gate dielectric other than silicon dioxide.
In a first aspect of the present invention, a field effect transistor includes a substrate comprising a source region, a drain region, and a channel region therebetween, an insulating layer disposed over the channel region, the insulating layer including a layer including aluminum nitride disposed over the channel region, and a gate electrode disposed over the insulating layer.
In another aspect, preferably the insulating layer further includes a layer of aluminum oxide disposed upon the channel region, the aluminum nitride disposed over or underneath the aluminum oxide.
In another aspect, preferably the insulating layer further includes a layer of silicon dioxide disposed upon the channel region, the aluminum nitride disposed over or underneath the silicon dioxide.
In another aspect, preferably the insulating layer further includes a layer of silicon nitride disposed upon the channel region, the aluminum nitride disposed over or underneath the silicon nitride.
Thus, the structure of the inventive device preferably includes at least one dielectric layer (e.g., aluminum nitride) and more preferably includes two dielectric layers, with the lower one being aluminum oxide (or silicon dioxide or silicon nitride) and the upper one being aluminum nitride. These materials can be either amorphous, or polycrystalline, or single crystalline.
Preferably, the aluminum oxide and aluminum nitride are deposited directly on top of the silicon surface, by any of a variety of techniques.
Hence, the invention provides a high dielectric constant gate dielectric for silicon complementary metal oxide semiconductor (CMOS) transistors that replaces the presently used silicon dioxide gate dielectric. This occurs due to the following reason. As mentioned earlier, the relevant scaling parameter is the ratio e/d, where e is the dielectric permittivity and d is the film thickness. It is noted that when the dielectric is silicon dioxide, e is restricted to a low value of 3.8. On the other hand, the permittivity of aluminum nitride is at least approximately in the range of 9-16. As a result, for an aluminum nitride dielectric layer, the physical thickness can be at least 2.5 times higher than that of a silicon dioxide layer and yet maintain the same e/d ratio. In other words, a silicon dioxide film and an aluminum nitride film that is more than 2.5 times thicker than the silicon dioxide film can be electrically equivalent to one another. Yet, on account of its higher physical thickness, the aluminum nitride layer will conduct a far lower leakage current than the silicon dioxide layer.
As a result, future miniaturized transistors requiring ultra thin gate dielectric layers, can use aluminum nitride-based dielectrics, thereby resulting in smaller, faster devices with low leakage currents.
A thicker physical layer also protects against the diffusion of impurities and dopants through the dielectric layer and protects the underlying silicon substrate.